Products > Domestic & PLC networks > tc4800

TC4800 is a low complexity/low power LDPC decoder supporting Wifi IEEE 802.11ac specifications.

The core supports throughput up to 1.7 Gbits/s on high end low-power process nodes.

Its unique architecture is optimized for ASIC, but it can be targeted efficiently for FPGA.

Functional coverage:

Supports Wifi IEEE 802.11ac specifications:

• block sizes range: 648, 1296, 1944
• code rate: 1/2, 2/3, 3/4, 5/6
• shortening, repetion, puncturing

Features:

• low power architecture
• throughput boost for maximum throughput with best error decoding performance
• efficient and close to ideal early stopping capability for reducing average number of iterations (reduced power consumption, higher average throughput)
• latency reduction by bank swapping
• no external memory required
• channel BER estimator
• ASIC core: Verilog or VHDL RTL source code
• FPGA core available on all popular Altera, Lattice and Xilinx devices

Related Cores:

• WiFi 802.11ac LDPC encoder (TC4850)
• WiFi Viterbi decoder (TC2800)