CCSDS turbo decoderProduct code: TC6000 |
Functional coverage:
- Fully compliant with CCSDS specification
- Block sizes range: 1784 to 16384 bits
- Code rates: 1/2, 1/3, 1/4, 1/6
- Encoder and decoder Cores available
Features:
- Log-MAP decoding algorithm for best coding gain
- Optional Cyclic Redundancy Check (CRC)
- On the fly change of block size, code rate, number of iterations.
- Single-chip FPGA Core, no external memory required
- Latency reduction by bank-swapping (2 input buffers)
- Encoder available