2016

May 17th

A small footprint, low power LTE Cat-0 turbo decoder (TC1770) is now available. The Core covers inverse bit-selection, HARQ combining, sub-block deinterleaver , turbo decoding and CRC check with a very small footprint and power consumption budget. The Core targets LTE Cat-0 and Cat-M applications, and is based on our silicon-proven TC1700 engine.

February 2nd

A very high throughput DVB-S2X FEC encoder Core (TC4050) is now available. The Core can reach payload bitrates up to 2.5 Gbits/s ( equivalent baud rates > 600Mbaud). The Core implements a very efficient parallel architecture for BCH and LDPC processing. It is fully validated and available on FPGA and ASIC targets.