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    About us > News > 2016

    2016

    A small footprint, low power LTE Cat-0 turbo decoder (TC1770) is now available. The Core covers inverse bit-selection, HARQ combining, sub-block deinterleaver , turbo decoding and CRC check with a very small footprint and power consumption budget. The Core targets LTE Cat-0 and Cat-M applications, and is based on our silicon-proven TC1700 engine.

    A very high throughput DVB-S2X FEC encoder Core (TC4050) is now available. The Core can reach payload bitrates up to 2.5 Gbits/s ( equivalent baud rates > 600Mbaud). The Core implements a very efficient parallel architecture for BCH and LDPC processing. It is fully validated and available on FPGA and ASIC targets.

    2015

    TurboConcept's TC4902 is a Gigabit-level LDPC Core fitting in a tiny silicon footprint, while not sacrificing SNR performance. The solution is well adapted to high throughput backhaul systems. The Core is field proven and both Tx and Rx Cores are available.

    TurboConcept's TC1600 is a flexible latest-generation turbo code solution offering unmatched FER performance downto FER<1e-5. The Core is well adapted to satcom or governmental systems. The Core is field proven and both Tx and Rx Cores are available.

    2014

    DVB-S2X standardization success story. Newtec and its affiliate TurboConcept took the lead to put the topic of an enhanced satellite transmission standard on the DVB agenda, teaming up with other DVB Members in order to define and develop an update to the DVB-S2 standard.
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    4G multi-mode decoder (TC1700) updated with low throughput, low complexity and low power profile (1X)

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